Proposed System:
- Reduce the more area coverage and power consumption level of the architecture.
Advantages:
- Reduce the complexity of hardware implementation
- Reduce the size
Software used:
- Modelsim
- Xilinx
Discount - 40%
A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors
Original price was: ₹10,000.00.₹6,000.00Current price is: ₹6,000.00.
Source Code : VHDL
Abstract:
A novel low-complexity multiple-input multiple-output (MIMO) detector tailored for single-carrier frequency division-multiple access (SC-FDMA) systems, suitable for efficient hardware implementations. The proposed detector starts with an initial estimate of the transmitted signal based on a minimum mean square error (MMSE) detector. Subsequently, it recognizes less reliable symbols for which more candidates in the constellation are browsed to improve the initial estimate. The proposed architecture of this paper analysis the logic size, area and power consumption using Xilinx 14.2.
List of the following materials will be included with the Downloaded Backup:
1. Source code ( Modelsim/ Xilinx/ Quartus/ DSCH3/ Microwind)
2. Existing and Proposed Project Comparison
3. Architecture Diagram
4. Algorithm with Flow chart
5. Report for Phase1 and Phase2
6. Proposed abstract document
7. Reference materials
8. Literature survey with Reference Document
9. Online Support ( Team viewer/ Ammy Admin)
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