Design of 4-bit Ripple carry adder and using 9T full adder

Source : VHDL & MICROWIND

Abstract:

A low power and high performance 1-bit full adder cell is proposed. The 8T Full Adder technique has been used for the generation of XOR function. Compared to the earlier designed 9 transistor full adder, the proposed adder shows a significant improvement in silicon area and power delay product. Additionally to implement the 8T full adder into 8bit RCA and BCD adder. The whole simulation has been carried out using microwind and the power are analysis using micro wind.

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