Proposed Title :

ReLOPE : Resistive RAM Based Linear First Order Partial Differential Equation Solver using Differential Low Noise Operational Amplifier

Improvement of this Project:

• To design the Overview of ReLOPE Architecture using Differential low noise Operational Amplifier at 45nm and 65nm CMOS Technology, and compared all the parameters in terms of area, delay and power.

Software implementation:

• Tanner EDA

Proposed System:

In this paper presents, a Von-Neumann based system to address an energy barrier when moving data between memory and processor units. The barrier is removed via in memory computing (IMC), RRAM based IMC has been investigated for data-intensive application like as artificial neural networks and matrix vector multiplications, which are considered “soft” workloads in which performance is more essential that correctness. Accuracy seems to be a determining component in “challenging” activities such as partial differential equations (PDEs). In this short, we offer ReLOPE, a completely RRAM crossbar based IMC that solves PDEs with 97% accuracy using the Runge-Kutta numerical technique. ReLOPE extends the solution’s functioning range by using shifters to shift input and output data. the ReLOPE range of operation and precision may be increases by programming other RRAM on the BL with fine grained steps sizes. When compared to software based PDE solvers. In this proposed work to design the Overview of ReLOPE Architecture using Differential low noise Operational Amplifier at 45nm and 65nm CMOS Technology, and compared all the parameters in terms of area, delay and power.

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ReLOPE: Resistive RAM-Based Linear First-Order Partial Differential Equation Solver