sale OFFER 40%

Image Processing, VLSI, VLSI Application / Interface and Mini Projects

A Dual-Mode ECG Segment Export Tool with RGB and Grayscale Hex Encoding in MATLAB

sale OFFER 38%

Accessories, VLSI, VLSI 2025

Design and Analysis of Energy Efficient Approximate Multipliers for Image Processing and DNN

sale OFFER 40%

2022, Area Efficient, VLSI

A Unified Approach for Realization of IIR Filters in Delta Domain

sale OFFER 50%

Accessories, VLSI, VLSI 2024

Approximate Multiplier Design with LFSR-Based Stochastic Sequence Generators for Edge AI

sale OFFER 33%

High speed VLSI Design, VLSI, VLSI 2023

Invasive RLS-Based Fetal ECG Extraction with Optimized Shift-and-Add Multiplier for Area-Efficient FPGA Implementation

sale OFFER 57%

Image Processing, VLSI, VLSI Application / Interface and Mini Projects

Image Encryption on FPGA Using Chaotic PRNG and LFSR: TFT Display Integration

sale OFFER 55%

Image Processing, VLSI, VLSI 2024

Hardware-Optimized High-Quality Super-Resolution Accelerator for Real-Time Edge Computing

sale OFFER 33%

Low power VLSI Design, VLSI, VLSI Application / Interface and Mini Projects

Low voltage high speed 8T SRAM cell for ultra-low power applications

sale OFFER 36%

Image Processing, VLSI, VLSI 2024

A Low Cost FPGA Implementation of Retinex Based Low-Light Image Enhancement Algorithm

sale OFFER 36%

Area Efficient, VLSI, VLSI 2024

A Hybrid TRNG-PRNG Architecture for High-Performance and Resource-Efficient Random Number Generation on FPGA

sale OFFER 50%

Area Efficient, VLSI, VLSI 2024

A Novel Design of High Speed Multiplier Using Hybrid Adder Technique

sale OFFER 50%

High speed VLSI Design, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of a ECG-DAC-SPI Interface for Medical Applications

sale OFFER 33%

Low power VLSI Design, VLSI, VLSI Application / Interface and Mini Projects

Design and Implementation of Arithmetic Logic Unit in DSCH3 and Microwind

sale OFFER 44%

Area Efficient, VLSI, VLSI 2024

Efficient Approximate Floating-Point Multiplier with Runtime Reconfigurable Frequency and Precision

sale OFFER 25%

Area Efficient, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of 8×8 Truncated Multiplier Using Brent Kung Parallel Prefix Adder

sale OFFER 28%

Area Efficient, VLSI, VLSI 2024

Efficient CRC-BCH Unified Encoder for Global Positioning System

sale OFFER 33%

Area Efficient, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of Comparative Analysis and Performance Evaluation for Different LFSR Techniques

sale OFFER 29%

Area Efficient, VLSI, VLSI 2024

Design and Implementation of 32-bit CSPRNG using the PRESENT cipher with Dual Polynomial PRNG for Enhanced Randomness and Precision

sale OFFER 25%

VLSI, VLSI Application / Interface and Mini Projects

Ultra Lightweight Cryptography: Exploring the Application and Optimization of the PRESENT Cipher

sale OFFER 50%

Area Efficient, VLSI, VLSI 2024

Efficient Pseudo Random Number Generator (PRNG) Design on FPGA

sale OFFER 33%

Area Efficient, VLSI, VLSI 2024

Optimized Dual Accumulator based RISC Architecture with Advanced Memory and Peripheral Operations

sale OFFER 52%

Area Efficient, VLSI, VLSI 2024

Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications

sale OFFER 50%

Area Efficient, VLSI, VLSI 2024

A High Speed CRC-32 Implementation on FPGA

sale OFFER 33%

High speed VLSI Design, VLSI, VLSI 2023

High Performance FIR and IIR Filters Based on FPGA for 16 Hz Signal Processing

sale OFFER 63%

Low power VLSI Design, VLSI, VLSI 2024

Soft-Error-Aware SRAM with Multinode Upset Tolerance for Aerospace Applications

sale OFFER 25%

Area Efficient, VLSI, VLSI Application / Interface and Mini Projects

Efficient Image Conversion and Restoration System with Hexadecimal Encoding and Quality Evaluation

sale OFFER 40%

Area Efficient, VLSI, VLSI 2023

Design and Evaluation of Inexact Computation based Systolic Array for Convolution

sale OFFER 33%

High speed VLSI Design, VLSI, VLSI 2023

Extraction of Fetal ECG from Abdominal and Thorax ECG Using a Non-Causal Adaptive Filter Architecture

sale OFFER 18%

Area Efficient, VLSI, VLSI 2023

Implementation of High-Precision MFCC Feature Extraction Using FPGA for Speech Recognition

sale OFFER 40%

2022, Area Efficient, VLSI

Parallel Pipelined Architecture and Algorithm for Matrix Transposition Using Registers

sale OFFER 20%

Area Efficient, VLSI, VLSI Application / Interface and Mini Projects

A Reversible Processor Architecture and Its Reversible Logic Design

sale OFFER 29%

2022, Area Efficient, VLSI

Design and Analysis of a Majority Logic Based Imprecise 6-2 Compressor for Approximate Multipliers

sale OFFER 28%

High speed VLSI Design, VLSI, VLSI 2023, VLSI_2023

MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications

sale OFFER 20%

High speed VLSI Design, VLSI, VLSI 2023

Fast and Hardware-Efficient Variable Step Size Adaptive Beamformer

sale OFFER 47%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

Design of High Speed 8-bit Vedic Multiplier using Brent Kung Parallel Prefix Adder

sale OFFER 47%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

Design and Implementation of an 8-bit Approximate Wallace Tree Multiplier for Energy Efficient Deep Neural Networks

sale OFFER 47%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

An Optimization in Conventional Shift &Add Multiplier for Area-Efficient Implementation on FPGA

sale OFFER 38%

Image Processing, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of TFT 1.8 inch SPI 128×160 Display ROM Interface

sale OFFER 40%

High speed VLSI Design, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of Spread Spectrum Clock Generator with Onion Modulation

sale OFFER 35%

Image Processing, VLSI, VLSI 2023, VLSI_2023

An Efficient Image Encryption Algorithm Based on Innovative DES Structure and Hyperchaotic Keys

sale OFFER 20%

Image Processing, VLSI, VLSI Application / Interface and Mini Projects

An Innovative Area Efficient Pixel Shuffling Method for Image Encryption Algorithm

sale OFFER 33%

VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of 64 Block Data Encryption Standard Algorithm

sale OFFER 33%

Image Processing, VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of Image Line Buffer to Split and reconstruct a 3×3 size of image pixel with using FIFO Design

sale OFFER 38%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

Toward the Multiple Constant Multiplication at Minimal Hardware Cost

sale OFFER 20%

2022, Area Efficient, VLSI

FPGA Implementation of Single Precision Floating Point Multiplier using High Speed Parallel Prefix Adder based Wallace Tree Multiplier

sale OFFER 36%

Low power VLSI Design, VLSI, VLSI 2023, VLSI_2023

Hybrid Protection of Digital FIR Filters

sale OFFER 33%

VLSI, VLSI Application / Interface and Mini Projects

Smart Intelligent and Adaptive Traffic Controller using FPGA

sale OFFER 50%

VLSI, VLSI Application / Interface and Mini Projects

Design and Implementation of Arithmetic Logic Unit in HDL

sale OFFER 38%

2022, Area Efficient, VLSI

Low power Dadda multiplier using approximate almost full adder and Majority logic based adder compressors

sale OFFER 50%

VLSI, VLSI Application / Interface and Mini Projects

Efficient Design of Behavioral Clock Divider for Multiple Frequency

sale OFFER 43%

2019, High speed VLSI Design, VLSI

FPGA Heart Rate Monitoring (Pre Processing – QRS Detection Stage)

sale OFFER 50%

VLSI, VLSI Application / Interface and Mini Projects

Design of Approximate Restoring Divider

sale OFFER 50%

VLSI, VLSI Application / Interface and Mini Projects

Hamming based Single Fault Error Correction Code

sale OFFER 50%

VLSI, VLSI Application / Interface and Mini Projects

FPGA Implementation of High Performance Reversible logic based 16×16 Array Multiplier

sale OFFER 50%

VLSI Application / Interface and Mini Projects

FPGA Implementation of 8×8 Truncated Multiplier

sale OFFER 36%

2021, High speed VLSI Design, VLSI

Design of SEU Tolerant 2D-FFT in SRAM-based FPGA

sale OFFER 60%

2021, High speed VLSI Design, VLSI

FPGA Implementation of D8PSK Demodulator

sale OFFER 50%

Low power VLSI Design, VLSI, VLSI 2023, VLSI_2023

A Lightweight True Random Number Generator for Root of Trust Applications

sale OFFER 40%

Low power VLSI Design, VLSI, VLSI 2023, VLSI_2023

Implementation of a Multipath Fully Differential OTA in 0.18-μm CMOS Process

sale OFFER 33%

2022, Image Processing, VLSI

Hardware Architecture for Adaptive Edge Directed Interpolation Algorithm

sale OFFER 52%

High speed VLSI Design, VLSI, VLSI 2023, VLSI_2023

ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters

sale OFFER 40%

2021, High speed VLSI Design, VLSI

A Pipelined Reduced Complexity Two Stages Parallel LMS Structure for Adaptive Beam forming

sale OFFER 40%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

Two Efficient Approximate Unsigned Multipliers by Developing New Configuration for Approximate 4:2 Compressors

sale OFFER 68%

Image Processing, VLSI, VLSI 2023, VLSI_2023

An Ultra-Efficient Approximate Multiplier with Error Compensation for Error-Resilient Applications

sale OFFER 60%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

Optimizing Ternary Multiplier Design with Fast Ternary Adder

sale OFFER 36%

High speed VLSI Design, VLSI, VLSI 2023, VLSI_2023

A VLSI-Based Hybrid ECG Compression Scheme for Wearable Sensor Node

sale OFFER 30%

Area Efficient, VLSI, VLSI 2023, VLSI_2023

AxPPA: Approximate Parallel Prefix Adders

sale OFFER 38%

2022, Area Efficient, VLSI

Variable-Precision Approximate Floating-Point Multiplier for Efficient Deep Learning Computation

sale OFFER 30%

2022, Area Efficient, VLSI

Power Efficient Approximate Divider Architecture for Error Resilient Applications

sale OFFER 43%

2022, Image Processing, VLSI

Image Demosaicking using Super Resolution Techniques

sale OFFER 25%

2022, Area Efficient, VLSI

Advanced Encryption Standard Algorithm with Optimal S-box and Automated Key Generation

sale OFFER 40%

2022, Image Processing, VLSI

Area and Power Efficient Truncated Booth Multipliers Using Approximate Carry-Based Error Compensation

sale OFFER 40%

2020, Area Efficient, VLSI

Power Efficient Tiny Yolo CNN Using Reduced Hardware Resources Based on Booth Multiplier and WALLACE Tree Adders

sale OFFER 49%

2022, Area Efficient, VLSI

Reconfigurable Architecture for Real-time Decoding of Canonical Huffman Codes

sale OFFER 60%

2022, High speed VLSI Design, VLSI

A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers

sale OFFER 44%

2017, Area Efficient, VLSI

Energy-Efficient VLSI Realization of Binary64 Division With Redundant Number Systems

sale OFFER 52%

2021, High speed VLSI Design, VLSI

FPGA Implementation of the Adaptive Digital Beamforming for Massive Array

sale OFFER 36%

2020, Area Efficient, VLSI

Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits

sale OFFER 38%

2020, Area Efficient, VLSI

Approximate Multiplier Design Using Novel Dual-Stage 4 : 2 Compressors

sale OFFER 40%

2022, Low power VLSI Design, VLSI

Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio

sale OFFER 50%

2022, Area Efficient, VLSI

Algorithm Level Error Detection in Low Voltage Systolic Array

sale OFFER 40%

2021, High speed VLSI Design, VLSI

Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing

sale OFFER 40%

2022, Low power VLSI Design, VLSI

A Reliable Low Standby Power 10T SRAM Cell With Expanded Static Noise Margins

sale OFFER 33%

2021, High speed VLSI Design, VLSI

Reconfigurable Digital Delta-Sigma Modulation Transmitter Architecture for Concurrent Multi-Band Transmission

sale OFFER 40%

2022, Low power VLSI Design, VLSI

Soft-Error-Aware Read-Stability-Enhanced Low-Power 12T SRAM With Multi-Node Upset Recoverability for Aerospace Applications

sale OFFER 50%

2022, Area Efficient, VLSI

Probability-Driven Evaluation of Lower-Part Approximation Adders

sale OFFER 40%

2022, Area Efficient, VLSI

A High-Throughput VLSI Architecture Design of Canonical Huffman Encoder

sale OFFER 30%

2022, Area Efficient, VLSI

A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic

sale OFFER 40%

2022, Area Efficient, VLSI

Recurrent Neural Networks With Column-Wise Matrix–Vector Multiplication on FPGAs

sale OFFER 43%

2022, Area Efficient, VLSI

A Configurable Floating Point Multiple Precision Processing Element for HPC and AI Converged Computing

sale OFFER 44%

2022, Area Efficient, VLSI

Low Cost Online Convolution Checksum Checker

sale OFFER 36%

2021, Area Efficient, VLSI

An Efficient and High Speed Overlap Free Karatsuba Based Finite Field Multiplier for FPGA Implementation

sale OFFER 44%

2021, Image Processing, VLSI

A Low Cost and High Throughtput FPGA Implementation of the Retinex Algorithm for Real Time Video Enhancement

sale OFFER 33%

2021, Area Efficient, VLSI

High Performance Accurate and Approximate Multipliers for FPGA based Hardware Accelerators

sale OFFER 20%

2021, Area Efficient, VLSI

Reliable CRC Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography

sale OFFER 54%

2021, High speed VLSI Design, VLSI

FPGA Based High Definition SPWM Generation With Harmonic Mitigation Property

sale OFFER 30%

2017, Area Efficient, VLSI

Comparative study of 16-order FIR filter design using different multiplication techniques

sale OFFER 47%

2019, Area Efficient, VLSI

Multiplier-free Implementation of Galois Field Fourier Transform on a FPGA

sale OFFER 29%

2019, Image Processing, VLSI

Constant Time Hardware Architecture for a Gaussian Smoothing Filter

sale OFFER 33%

2021, Low power VLSI Design, VLSI

A Three Stage Comparator and Its Modified Version With Fast Speed and Low Kickback

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