Energy-Efficient Syndrome Calculation Architecture for BCH Decoders
Energy-Efficient Syndrome Calculation Architecture for BCH Decoders
Abstract:
Syndrome calculation (SC) is a critical step in Bose–Chaudhuri–Hocquenghem (BCH) decoding, and its computational efficiency significantly impacts the energy consumption of the entire decoder. This article proposes an energy-efficient SC architecture designed for BCH decoders. The proposed architecture fundamentally adopts a remainder-based SC, which consumes less energy than the conventional Horner’s method-based SC unit. Furthermore, unlike previous remainder-based approaches, it uses a minimal polynomial to produce a shorter remainder, leading to reduced computation and improved energy efficiency. Implementation results demonstrate an 80% improvement in energy efficiency compared to the latest Horner’s method-based SC unit and a 35% improvement compared to the previous remainder-based SC unit.
