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NXFEE – Area Efficient

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sale OFFER 14%
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A 0.1–3.5-GHz Duty-Cycle Measurement and Correction Technique in 130-nm CMOS

₹6,000.00
sale OFFER 50%
Constant Current Source
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A 65-nm CMOS Constant Current Source With Reduced PVT Variation

₹6,000.00
sale OFFER 30%
Vedic Sutras
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A Comparative Analysis of Multiplier Topologies using Different Vedic Sutras

₹7,000.00
sale OFFER 43%
Multiple Precision
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A Configurable Floating Point Multiple Precision Processing Element for HPC and AI Converged Computing

₹20,000.00
sale OFFER 57%
BCH Codes
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A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories

₹15,000.00
sale OFFER 25%
AES
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A Design Implementation and Comparative Analysis of Advanced Encryption Standard (AES) Algorithm on FPGA

₹15,000.00
sale OFFER 33%
Placeholder
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A Floating-Point Fused Dot-Product Unit

₹10,000.00
sale OFFER 33%
Multiply-Accumulate Unit
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A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations into Partial Product Reduction Process

₹12,000.00
sale OFFER 43%
Hardware Accelerator for Lossless Compression
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A High-Throughput Hardware Accelerator for Lossless Compression of a DDR4 Command Trace

₹20,000.00
sale OFFER 40%
Canonical Huffman Machine
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A High-Throughput VLSI Architecture Design of Canonical Huffman Encoder

₹12,000.00
sale OFFER 30%
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A Low-Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2 m)

₹7,000.00
sale OFFER 40%
GDI
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A Novel Design of Flip-Flop Circuits using Quantum Dot Cellular Automata (QCA)

₹9,000.00
sale OFFER 20%
Wallace Tree Multiplier
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A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic

₹16,000.00
sale OFFER 29%
Ternary
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A Review on Fundamentals of Ternary Reversible Logic Circuits

₹10,000.00
sale OFFER 30%
Robust EnergyArea-Efficient
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A Robust Energy/Area-Efficient Forwarded-Clock Receiver with All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects

₹7,000.00
sale OFFER 33%
Two-Speed, Radix-4, Serial–Parallel Multiplier
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A Two-Speed, Radix-4, Serial–Parallel Multiplier (Booth Multiplier )

₹10,000.00
sale OFFER 25%
Advanced Encryption Standard
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Advanced Encryption Standard Algorithm with Optimal S-box and Automated Key Generation

₹15,000.00
sale OFFER 40%
Systolic_Array
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Algorithm Level Error Detection in Low Voltage Systolic Array

₹12,000.00
sale OFFER 36%
Finite Field Multiplier
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An Efficient and High Speed Overlap Free Karatsuba Based Finite Field Multiplier for FPGA Implementation

₹16,000.00
sale OFFER 30%
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An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis.

₹7,000.00
sale OFFER 50%
Wallace_Tree
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An Efficient Design for Reversible Wallace Unsigned Multiplier

₹8,000.00
sale OFFER 30%
Floating_Point_Multiplier
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An Efficient Implementation of Floating Point Multiplier

₹14,000.00
sale OFFER 33%
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An LUT Based RNS FIR Filter Implementation for Reconfigurable Applications

₹10,000.00
sale OFFER 38%
Approximate Multiplier
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Approximate Multiplier Design Using Novel Dual-Stage 4 : 2 Compressors

₹20,000.00
sale OFFER 29%
Binary Tree Adder
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Area Delay and Energy Efficient Multi-Operand Binary Tree Adder

₹10,000.00
sale OFFER 42%
Carry Select Adder
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Area Delay Power Efficient Carry Select Adder

₹7,000.00
sale OFFER 33%
Area Efficient Bidirectional Shift Register
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Area-Efficient Bidirectional Shift-Register Using Bidirectional Pulsed-Latches

₹10,000.00
sale OFFER 50%
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ASIC design of UHF RFID reader digital baseband

₹6,000.00
sale OFFER 22%
Approximate Parallel Prefix Adders
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AxPPA: Approximate Parallel Prefix Adders

₹14,000.00
sale OFFER 30%
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Byte-Reconfigurable LDPC Codec Design With Application to High-Performance ECC of NAND Flash Memory Systems

₹7,000.00
sale OFFER 25%
Combating Data Leakage Trojans
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Combating Data Leakage Trojans in Commercial and ASIC Applications With Time-Division Multiplexing and Random Encoding

₹12,000.00
sale OFFER 33%
FIR VEDIC
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Comparative study of 16-order FIR filter design using different multiplication techniques

₹12,000.00
sale OFFER 38%
Compressor
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Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers

₹10,000.00
sale OFFER 33%
Implementation of Reconfigurable CORDIC
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Concept Design and Implementation of Reconfigurable CORDIC

₹10,000.00
sale OFFER 36%
Wallace_Tree
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Design and analysis of High speed Wallace tree multiplier using parallel prefix adders for VLSI circuit designs

₹16,000.00
sale OFFER 40%
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Design and Low-Complexity Implementation of Matrix–Vector Multiplier for Iterative Methods in Communication Systems

₹6,000.00
sale OFFER 60%
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Design of Testable Reversible Sequential Circuits

₹4,000.00
sale OFFER 36%
Parallel Booth Multiplier
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Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits

₹16,000.00
sale OFFER 40%
fixed-width adder-tree
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Efficient Design for Fixed-Width Adder-Tree

₹12,000.00
sale OFFER 52%
Binary Division
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Energy-Efficient VLSI Realization of Binary64 Division With Redundant Number Systems

₹12,000.00
sale OFFER 44%
ER_TCAM_A Soft Error Resilient SRAM Based TCAM
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ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs

₹10,000.00
sale OFFER 25%
Error_Detection_Correction_SRAM_Emulated_TCAM
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Error Detection and Correction in SRAM Emulated TCAMs

₹15,000.00
sale OFFER 52%
Multiply_accumulate
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Feed forward-Cutset-Free Pipelined Multiply–Accumulate Unit for the Machine Learning Accelerator

₹12,000.00
sale OFFER 33%
True Random Number Generation
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FPGA Based True Random Number Generation Using Programmable Delays in Oscillator Rings

₹12,000.00
sale OFFER 25%
Long polar codes
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FPGA Implementation of Partially Parallel Encoder Architecture for Long Polar Code

₹9,000.00
sale OFFER 40%
FM0Manchester Encoding Using SOLS Technique for DSRC
FM0Manchester Encoding Using SOLS Technique for DSRC
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Fully Reused VLSI Architecture of FM0Manchester Encoding Using SOLS Technique for DSRC Applications

₹9,000.00
sale OFFER 33%
Approximate Multipliers
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High Performance Accurate and Approximate Multipliers for FPGA based Hardware Accelerators

₹10,000.00
sale OFFER 42%
Placeholder
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High Speed and Energy Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels

₹7,000.00
sale OFFER 50%
TSPC D Flip-Flop
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High speed and low power preset-able modified TSPC D flip-flop design and performance comparison with TSPC D flip-flop

₹4,000.00
sale OFFER 52%
MDCLCG
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High Speed Area Efficient VLSI Architecture of Three Operand Binary Adder

₹12,000.00

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