This article presents an energy-efficient voltage-mode transmitter with an unsegmented output driver that equalizes channel loss in the time domain based on the phase delay analysis. By modulating the phase of the transmitting clock rather than the serialized data stream, the proposed transmitter significantly reduces data-dependent jitter. The horizontal eye opening is improved by compensating for the zero-crossing time variation dependent on the run length of the transmitted data. The proposed scheme significantly reduces the driver complexity by eliminating many driver slices that consume large signaling and switching power. The prototype chip has been fabricated in a 28-nm CMOS process and occupies an active area of 0.045 mm 2 . The measured results show that the proposed transmitter achieves an energy efficiency of 0.95 pJ/b at 22 Gb/s with an output swing of 440 mV ppd at 1.0-V supply. In addition, peak-to-peak jitter is reduced from 34 to 20 ps at 22 Gb/s with the proposed phase delay compensation over the channel with a 15.0-dB loss.
Software Implementation:
Modelsim
Xilinx
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A 22-Gb/s 0.95-pJ/b Energy-Efficient Voltage-Mode Transmitter With Time-Based Feedforward Equalization in a 28-nm CMOS
