This brief presents a low-power processor using Photoplethysmography (PPG) for real-time biometric identification (ID) and heart rate (HR) estimation. The proposed processor features a low-power, highly-integrated solution by using the algorithm-hardware co-design approach with the proposed compact neural-network topology, model compression flow, and efficient hardware architecture. A prototype chip fabricated in the 180 nm CMOS process occupies an area of 5.80 mm2. Measurement results show that the proposed design can operate at 320 KHz and realize simultaneous ID and HR estimation with state-of-the-art prediction performances while consuming 427.0μW at 1 V. This represents 8.6x, 4.1x, and 32x performance improvements in area, power, and latency, respectively, when compared to the previous works.
Software Implementation:
Xilinx
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A Low-Power PPG Processor for Real-Time Biometric Identification and Heart Rate Estimation