An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application
An Optimized Low-Power VLSI Architecture for
ECG/VCG Data Compression for IoHT
Wearable Device Application
Abstract:
Continuous monitoring of the electrical activity of heart signals using wearable Internet of Healthcare Things (IoHTs) devices plays a crucial role in decreasing mortality rates. However, this continuous monitoring using an electrocardiogram (ECG) or vectorcardiogram (VCG) generates huge clinical data. Moreover, these devices are constrained in terms of on-chip storage, data transmission capacity, and power. Thus, handling a large amount of data with these devices is difficult, making it necessary to compress the data for storage and transmission. Lossless or near-lossless data compression solves this problem, ensuring that no relevant physiological/clinical information is lost in the compression process. Therefore, low-power, resource-efficient, and lossless VLSI architectures are proposed in this article to compress multichannel ECG/VCG data. The designs are tested using the PTB database for both ECG and VCG data and can achieve compression ratios (CRs) of 3.857 and 4.45 with minimal power and area requirements, making them suitable for low-power wearable healthcare devices.
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An Optimized Low-Power VLSI Architecture for
ECG/VCG Data Compression for IoHT
Wearable Device Application
