Ultra-low-power analog circuits play a vital role in applications such as Internet of Things devices, wearable electronics, biomedical monitoring systems, and sensor interfaces, where low energy consumption, compact area, and reliable operation at reduced supply voltages are essential advantages. However, these systems also face challenges such as limited voltage headroom, reduced speed, and performance degradation when operating in deep-submicron technologies. Conventional gate-driven OTAs struggle to operate efficiently below 0.5 V, while existing bulk-driven OTAs, although suitable for low-voltage operation, often suffer from low gain, higher delay, and poor robustness. Most reported solutions improve gain or stability at the cost of increased power consumption, larger silicon area, or additional biasing complexity, and comparative studies across advanced CMOS nodes are limited. To address these limitations, this work presents the design of a two-stage operational transconductance amplifier using a bulk-driven technique combined with self-cascode composite transistors and intrinsic current-buffer Miller compensation, implemented in both 45 nm and 22 nm CMOS technologies. The proposed architecture achieves high voltage gain without additional bias voltages, while the intrinsic current-buffer compensation ensures stable frequency response with minimal area overhead. The novelty of this work lies in the systematic comparison of the proposed OTA across 45 nm and 22 nm technologies, highlighting improvements in power consumption, silicon area, and delay achieved through technology scaling while preserving stable operation. The design performance is evaluated using circuit level simulations on Tanner EDA platforms, with key parameters such as gain, power consumption, area, and delay carefully analysed. The results demonstrate that the proposed OTA achieves ultra-low-power operation with improved efficiency and scalability, making it well suited for next-generation low-power analog front-end applications.

Software Implementation:

• Modelsim
• Xilinx

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An Energy Efficient Two-Stage CMOS OTA with Self Cascode Composite Transistors and Intrinsic Current Buffer Miller Compensation in 45nm and 22nm CMOS Technologies