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The Mesochronous Dual-Clock FIFO Buffer
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The Mesochronous Dual-Clock FIFO Buffer

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Towards Efficient Modular Adders based on Reversible Circuits

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Two Efficient Approximate Unsigned Multipliers by Developing New Configuration for Approximate 4:2 Compressors

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Variable-Precision Approximate Floating-Point Multiplier for Efficient Deep Learning Computation

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