Proposed Title :

FPGA Implementation of High Performance and Low Power FIR Filter Design using Rounding Based Approximate Multiplier ( RoBA Multiplier)

Improvement of this Project:

• In FIR filter designed, will used design any multipliers, if last frequent years, the MCM technique will used, as a proposed of FIR filter design, but the drawback is MCM technique will not work both thing of signed and un-signed operation, so it will we need to design separate MCM for signed and unsigned multiplication. So here, we are proposed a MCM with Rounded based approximate multiplier that includes both signed and unsigned operation in single multiplier, this multiplier will implemented in FIR Filter, and shown the efficiency of area, power and delay

Software implementation:

• Modelsim
• Xilinx

Proposed System:

Finite Impulse response (FIR) digital filter is widely used in several digital signal processing application, such as speech processing, loud speaker equalization, echo cancellation, adaptive noise cancellation, and various communication application, including software-define radio (SDR) and so on. Many of these application require FIR filter of large order to meet the stringent frequency specification. Very often these filters need to support high sampling rate for high-speed digital communication. The number of multiplication and additions required for each filter output, however, increases linearly with the filter order. Since there is no redundant computation available in the FIR filter algorithm, real-time implementation of a large order FIR filter in a resource constrained environment is a challenging task. Filter coefficients very often remain constant and known a priori in signal processing application. This feature has been utilized to reduced the complexity of realization of multiplications.

In FIR filter designed, will used design any multipliers, if last frequent years, the MCM technique will used, as a proposed of FIR filter design, but the drawback is MCM technique will not work both thing of signed and un-signed operation, so it will we need to design separate MCM for signed and unsigned multiplication. So here, we are proposed a MCM with Rounded based approximate multiplier that includes both signed and unsigned operation in single multiplier, this multiplier will implemented in FIR Filter, and shown the efficiency of area, power and delay.

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RoBA Multiplier A Rounding Based Approximate Multiplier for High Speed yet Energy Efficient Digital Signal Processing