RF Power Gating A Low Power Technique for Adaptive Radios

Description

Proposed Title : FPGA Implementation of RF Power gating with Low Power Technique of Adaptive Radios using BPSK Modulaiton Proposed System: Modified the MSK (Minimum Shift Keying) to BPSK ( Binary Shift Keying) Less Bandwidth Power Consumption is less High Speed data Transfer with Multi-Bit Differential Signal Less BER Error rate Software implementation: Modelsim Xilinx

Existing System:

WIRELESS receivers (RXs) are more and more used in everyday applications, such as cell phones, medical implants and devices, radio-frequency identification (RFID) tracking tags, and sport coaching devices. For these applications, radio-frequency (RF) communications are widely used instead of other types of wireless communications, such as ultrasound or infrared, which are less convenient and robust. Most of the time those devices are battery-powered and one of their major requirements is an extended battery lifetime. Consequently, the research in this field focuses in decreasing the power consumption of these RXs.

The technique presented throughout this paper is a part of the adaptive radios field and aims at scaling the RX performances with the power consumption without changing the RX architecture. This technique, called RF power gating (RFPG), consists in extending the sleep mode scheme from the frame-to-frame scale to the symbol time scale. In other words, each fast enough RF front-end component is turned ON and OFF during a symbol time reducing its average power consumption. While the analog blocks are only required to settle fast enough to be RFPG-compliant, the RF front-end architecture is kept unchanged so as to allow switching between the full performances reception and the low-power mode. As a result, the RFPG-related processing is done with digital blocks, which also allows benefiting from advances in the next generation technology. In this paper, RFPG is presented for the minimum-shift keying (MSK) modulation, since it is well suited for non coherent demodulation and its constant envelope allows the use of efficient amplifiers, which is an advantage for low-power and low-cost devices. Moreover, this technique is also compatible with other modulations, such as Gaussian MSK (GMSK), frequency-shift keying (FSK), and binary phase-shift keying (BPSK), but the decoders and their corresponding bit error rates (BER) are not presented in this paper.

Disadvantages:

• More Bandwidth
• More Power dissipation
• Less Speed
• More BER Error Rate

Proposed System:

  The technique presented throughout this paper is part of adaptive radios field and aims at scaling the RX performances with the power consumption without changing the RX architecture. This technique, called RF Power gating ( RFPG), consists in extending the sleep mode scheme from the frame-to-frame scale to the symbol time scale. In other words, each fast enough RF front-end component will be modified to BPSK modulation, will be send the data through phase shifting to increases the BER performance, and also reduced the power consumption compared to the existing system. While the analog blocks are only required to settle fast enough to be RFPG-compliant, the RF front-end architecture is to allow switching between the full performances reception and the low power mode. As a results, the RFPG-related processing is done with digital blocks, which also allows benefiting from advances in the next generation technology. This paper expresses and underlined the tradeoff between the BER Performances degradation due to not observing the BPSK modulation signal during the whole symbol time and the power saving obtained. The study presented gives to the designers, interested in using this adaptive solution with their full performances RXs, with modified receiver with the help of BPSK demodulation.

Advantages:

• Less Bandwidth
• Power Consumption is Good
• High Speed data Transfer with Multi-Bit Differential Signal
• Less BER Error Rate

Software implementation:

• Modelsim
• Xilinx