Proposed Title :
FPGA Implementation of 2D polyphase Decomposition and Farrow Structure FIR Filter using Truncation Multiplier
Improvement of this Project:
To implement 2D Polyphase Decomposition FIR Filter using Truncation Multiplier
To implement 2D Farrow Structure FIR Filter using Truncation Multiplier
- Xilinx 14.2
In this recent digital signal processing applications, will have lot of filter designs in finite impulse response method, in such as it will take more complexity in 2D domain thus it will take more hardware complexity in crucial area and more critical paths, here this proposed work will presents a Farrow structure based interpolation filter design using the polyphase decomposition of 1D filter which effectively utilized in 2D digital domain, here this polyphase decomposition and Farrow structure will implemented using truncation multiplier, this truncation method will reduced the hardware complexity in internal and external part of multiplication and additions, thus it will provide n x n of n output in all sub filters. Finally this work presents in VHDL and synthesized in XILINX FPGA, and compared in terms of area, delay and power.
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Low-Complexity 2-D Digital FIR Filters Using Polyphase Decomposition and Farrow Structure
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