Description

Proposed Title :

CMOS Implementation of Low Power and High Performance RF Receiver for WSN

Improvement of this Project:

• To implement Trans-conductance LNA (Low Noise Amplifier), Mixer & Local Oscillator Baseband Filter and TIA (Trans-impedance Amplifier).

• To implement RF receiver with the help of above listed building blocks.

• To implement RF receiver at 45 nm and 130 nm CMOS Technology and compared all the parameters in terms of area, delay and power.

Software implementation:

• TANNER EDA

Existing System:

Wireless circuits operating in the industrial, scientific, and medical (ISM) band are under focus today. This focus arises from an increased interest in the wireless sensor network (WSN) and short-range wireless devices as the Internet of Things (IoT) continues to evolve at a rapid pace. However, the growth in the wireless communication sector and an increasing number of wirelessly connected devices cause spectrum congestion. This congestion is manipulated by moving wireless communication to other frequency bands, nonetheless, the congestion problem still exists. A review of IoT and WSN specifications shows that devices can tolerate a large noise figure (NF) however, device power consumption should be minimized to extend the battery life. This makes low power consumption a vital design target. In addition, the wireless system should have adequate linearity to overcome the increased number of blockers as the number of connected devices is increased. Moreover, designing the wireless system to operate on a wide range of frequencies would make it more cost effective.

On the other hand, WSN or IoT transceiver is typically accompanied with energy harvesting unit from multiple sources. The dependence on the energy supplied from the energy harvesting sources varies between partial dependence and full dependence with storage capability techniques to maximize the use of energy over a period of time. In case of a self-sustainable WSN node, implementing the wireless transceiver with programmability in power consumption based on the energy availability would be useful. However, the transceiver performance needs to be assessed carefully to count for system limitations.

Examining the prior art, Masuch and Delgado-Restituto and Cruz et al.Introduce low-power receivers with lower NF; however, the former achieves high linearity with low gain while the later achieves low linearity with high gain. Khan and Wentzloff present a short-range low-power wireless receiver with Gilbert active mixer-first architecture, however, the receiver suffers from high NF, which limits the receiver sensitivity and poor linearity. Balankutty et al. present an ISM band receiver, however, it suffers from high power consumption. Low-power wireless receivers with different techniques to reduce the NF and power consumption were introduced.

Disadvantages:

• • • Low Frequency Range
    • Power Consumption is High

Proposed System:

In recent technology of  high level signal processing and application will have lot of complexity to transmit and receive a signals in RF (Radio frequency ) based WSN. In this part early RF module will consist of separate blocks for low noise amplifier, mixer and filter with single or double conversion voltage signal processing, for this kind number block will create more critical path, due to these area complexity and power consumption will increases, and it’s not performing good in accuracy.  Here this proposed work will present, 900-MHz based RF receiver in one block with local oscillator, mixer, filter, LNA and TIA. This method of proposed architecture will design in Tanner EDA at 130nm and 45nm CMOS technology with perform good in area, delay and power.

Advantages:

• • • • Low power high linear wireless receiver
      • High Frequency Range receivers
      • Improved Linearity
      • Power consumption is low

” Thanks for Visit this project Pages – Buy It Soon “

Highly Linear Low-Power Wireless RF Receiver for WSN

“Buy VLSI Projects On On-Line”