Proposed Title :
CMOS Implementation of Low Power and High Performance RF Receiver for WSN
Improvement of this Project:
To implement Trans-conductance LNA (Low Noise Amplifier), Mixer & Local Oscillator Baseband Filter and TIA (Trans-impedance Amplifier).
To implement RF receiver with the help of above listed building blocks.
To implement RF receiver at 45 nm and 130 nm CMOS Technology and compared all the parameters in terms of area, delay and power.
- TANNER EDA
In recent technology of high level signal processing and application will have lot of complexity to transmit and receive a signals in RF (Radio frequency ) based WSN. In this part early RF module will consist of separate blocks for low noise amplifier, mixer and filter with single or double conversion voltage signal processing, for this kind number block will create more critical path, due to these area complexity and power consumption will increases, and it’s not performing good in accuracy. Here this proposed work will present, 900-MHz based RF receiver in one block with local oscillator, mixer, filter, LNA and TIA. This method of proposed architecture will design in Tanner EDA at 130nm and 45nm CMOS technology with perform good in area, delay and power.
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Highly Linear Low-Power Wireless RF Receiver for WSN
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