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FIFO Buffers of NoC

In-Field Test for Permanent Faults in FIFO Buffers of NoC Routers

₹6,000.00

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Source Code : VHDL

Abstract:

This brief proposes an on-line transparent test technique for detection of latent hard faults which develop in first input first output buffers of routers during field operation of NoC. The technique involves repeating tests periodically to prevent accumulation of faults. A prototype implementation of the proposed test algorithm has been integrated into the router-channel interface and on-line test has been performed with synthetic self-similar data traffic. The performance of the NoC after addition of the test circuit has been investigated in terms of throughput while the area overhead has been studied by synthesizing the test hardware. In addition, an on-line test technique for the routing logic has been proposed which considers utilizing the header flits of the data traffic movement in transporting the test patterns.

List of the following  materials will be included with the Downloaded Backup:

1. Source code ( Modelsim/ Xilinx/ Quartus/ DSCH3/ Microwind)
2. Existing and Proposed Project Comparison
3. Architecture Diagram
4. Algorithm with Flow chart
5. Report for Phase1 and Phase2
6. Proposed abstract document
7. Reference materials
8. Literature survey with Reference Document
9. Online Support ( Team viewer/ Ammy Admin)



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In-Field Test for Permanent Faults in FIFO Buffers of NoC Routers

 

 

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