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Electrical Capacitance Tomography

A New Parallel VLSI Architecture for Real-time Electrical Capacitance Tomography

₹10,000.00

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Source : VHDL

Abstract:

This paper presents a fixed-point reconfigurable parallel VLSI hardware architecture for real-time Electrical Capacitance Tomography (ECT). Another FPGA module performs the inverse steps of the tomography algorithm. A dual port built-in memory banks store the sensitivity matrix, the actual value of the capacitances, and the actual image with RGB format. A two dimensional (2D) core multiprocessing elements (PE) engine intercommunicates with these memory banks via parallel buses. We are focus only on the FPGA module because the design is decide the power consumption and cost. The proposed architecture of this paper analysis the logic size, area and power consumption using Xilinx 14.2.

List of the following  materials will be included with the Downloaded Backup:

1. Source code ( Modelsim/ Xilinx/ Quartus/ DSCH3/ Microwind)
2. Existing and Proposed Project Comparison
3. Architecture Diagram
4. Algorithm with Flow chart
5. Report for Phase1 and Phase2
6. Proposed abstract document
7. Reference materials
8. Literature survey with Reference Document
9. Online Support ( Team viewer/ Ammy Admin)

Software implementation:

  • Modelsim
  • Xilinx 14.2

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A New Parallel VLSI Architecture for Real-time Electrical Capacitance Tomography

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Electrical Capacitance Tomography A New Parallel VLSI Architectu...

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