Proposed Title :
HDL-Based Modeling Approach for Digital Simulation of Adiabatic Quantum Flux Parametron Logic for Carry Look ahead Adder
Improvement of this project :
To implement the basic gates in the AQFP(Adiabatic Quantum Flux Parametron) Logic and developed the verilog HDL code of 16 bit Carry Look ahead Adder.
Implement this adder in HDL and shown the comparison in terms of area, power and Delay reports.
Adiabatic quantum-flux-parametron (AQFP) logic is one kind of novel superconductor logic offering extremely high-energy efficiency for building high-performance computing systems. This paper proposes the concept of Adiabatic quantum flux parametron logic simulation in (Hardware Description Language)HDL modeling approach. In this paper, the basic gates are implemented in the logic of Adiabatic Quantum Flux Parametron. By using this technique, this paper proposes the 16 bit carry look ahead adder which is implemented in the HDL modeling approach. Therefore, the AQFP logic based implementation of adder function has extremely high energy efficiency for high performance computing device when compared to basic CMOS Technology. Thus, the proposed system uses the AQFP based logic function of adder in order to attain better and high efficiency. Finally, this technique is implemented in the HDL and Synthesized using XILINX and compared the performance in terms of area, power and delay reports.
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HDL-Based Modeling Approach for Digital Simulation of Adiabatic Quantum Flux Parametron Logic
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