Proposed Title :
A 16 nm CMOS Technology of 9T SRAM which using One-Sided Schmitt Trigger
Improvement of this Project:
To design this 9T SRAM at 16nm and 22nm CMOS technology and proved the comparisons of area, delay and power.
To extend this 9T SRAM up to 8-bit and designed at 16nm and 22nm CMOS Technology and proved the comparisons of area, delay and power.
- Tanner EDA
In this paper present, a one sided schematic triggered based read and write operation form 9T static random access memory cell, it will consume low power and energy consumptions with high read and write stability. The proposed method of schmitt trigger based 9T SRAM memory cell which obtain high read stability in one sided schmitt triggered inverter with a single bit line structure, similarly the write ability will improve the power gating in schmitt trigger inverter with a write assist of control and trip voltage of schmitt trigger inverter. In this proposed work of this paper will designed this 9T SRAM memory cell single bit and 8-bit level which using 16nm and 22nm CMOS technology and proved the performance of area, delay and power in Tanner EDA tool.
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One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation
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