Proposed Title :

• CMOS Trans-conductance LNA integration of Vital Sign Processing Receiver with Clutter Elimination using SC Chebyshev LPF

Improvement of this Project:

• To Design the Third Order SC Chebyshev LPF (Low pass Filter) using Trans-conductance LNA (Low Noise Amplifier) at 130 nm and 45 nm CMOS Technology and proved the comparisons of Area and Power Consumptions.

Software implementation:

• TANNER EDA

Proposed System:

This brief describes a vital sign processing circuit without any automated signal processing or algorithm support for the ultra wideband (UWB) pulse-based radar system for simultaneous dc/near-dc exclusion and out-of-band interference elimination. As a stable and balanced pseudo resistor applied under a servo feedback loop in a vital-sign receiver of the sensing radar, an intrinsic self-balanced MOS diode (SBMD) was suggested to act as a High-Pass Filter (HPF) with an ultra-low corner frequency lower than 0.5 Hz to eliminate undesired clutters of reflected signals and input dc-offset voltages from innate circuit offsets. A third-order switched-capacitor (SC) Chebyshev low-pass filter (LPF) with trans-conductance low noise amplifier (LNA) and leap-frog topology was adopted as the subsequent stage to eliminate out-band noises, developing an integrated band pass frequency response vital-sign processing circuit and inserting it into a radar module to check its feasibility. Finally, this work was developed in Tanner EDA at 130 nm and 45 nm CMOS Technology.

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Vital-Sign Processing Receiver With Clutter Elimination Using Servo Feedback Loop for UWB Pulse Radar System

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