Proposed Title :
FPGA Implementation of Low Power OFDM Baseband Transceiver using VIRTEX-6 FPGA Family
OFDM/COFDM also called multicarrier modulation, uses multiple carrier signals at different frequencies. It sends some of the bits on each channel. This is similar to FDM. However in case of OFDM, all of the sub channels are dedicate to a single data source. OFDM allows many users to transmit in an allocated band spectrum by dividing available bandwidth into many narrow bandwidth carriers. The transmission is occurs in such a way that the carriers used are orthogonal to each other to allows them to be packed together much closer than standard frequency division multiplexing this leads to OFDM/COFDM providing a high spectral efficiency. OFDM was recognized as an outstanding method for high-speed cellular data communication where its implementation relies on very high-speed digital signal processing.
- less performance
- Efficiency is low
The Randomizer is used for generating random bit. The first three blocks in the transmitter section are used for data coding and interleaving. Then the coded bits are to be mapped by the constellation modulator by using Gray codification, in this way an + j bn values are obtained in the constellation modulator. The serial to parallel converter is used convert the data bits from the serial form to the parallel form. The output from the serial to parallel converter is then applied to Inverse Fast Fourier Transform (IFFT) transforms, it transforms the signals from the frequency domain to the time domain;
IFFT converts a large number of complex data points of length that is power of 2, into the same number of points but in the time domain. The number of sub-bands in the available spectrum is split into is determined by the number of subcarriers. The Cyclic Prefix (CP) is a replica of the last N samples from the Inverse Fast Fourier Transform, which are placed at the beginning of the OFDM frame. It overcomes ISI problem. It is important to choose the minimum necessary CP to maximize the efficiency of the system.
The received signal is applied to the cyclic prefix removal block then the output from cyclic prefix removal block is fed to a serial-to-parallel converter. After that, the signals are passed through an N-point fast Fourier transform. N-point fast Fourier transform converts the signal to frequency domain. The output of the FFT is formed by first M- samples of the output. The demodulation can be made by Discrete Fourier Transform, or better, by Fast Fourier transform that is it is very efficient implementation that can be used to reducing the time of processing and the used hardware. FFT calculates DFT with a great reduction in the amount of operations, leaving several existent redundancies in the direct calculation of DFT.
- Better performance
- Efficiency is high
- Xilinx ISE