Proposed Title :

• FPGA Implementation of Multipumping Enabled with Multiported SRAM using Ternary Contenet Addressable Memory

Improvement of this Project:

• To developed TCAM based Multipumping Enabled Multiport SRAM on different case such as
• Case I = 512×28 (P=4)
• Case II = 512×32 (P=2)
• Case III = 1024×140 (P=4)
• Case IV = 2048×280 (P=4)
• Done this work in Verilog HDL, and Synthesized in Xilinx VERTEX-5 FPGA and compared all the parameters in terms of Area, delay and power.

Software implementation:

• Modelsim
• Xilinx 14.2

Proposed System:

In the recent technology of digital gadgets a memory is a main priority one for storage and reterive the data, but in digital communication system the data transmission based memory will occpy more space in all gadgets, therfore this problem need to overcomes here with Ternary Content Addressable Memory(TCAM). In this existing method of TCAM design will have minimum depth limitation, which limited storage efficientcy of TCAM bits. Our propsoed work will get a solution for this limitation by mapping the existing TCAM method to Multipumping enabled with multiported SRAM based TCAM, it will configure number of sub-blocks in single TCAM with simple dual port method. Here, this paper will present a Multipumping Multiported SRAM in different limitiations such as Case I = 512×28 (P=4), Case II = 512×32 (P=2), Case III = 1024×140 (P=4), Case IV = 2048×280 (P=4). This work will implemented in Xilinx VERTEX-5 FPGA with using Verilog HDL Language and proved the better performance in terms of area, delay and power.

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Efficient TCAM Design Based on Multipumping Enabled Multiported SRAM on FPGA

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