Proposed Title :
FPGA Implementation of Modulator and Demodulator architecture for 8 & 16 Differential Phase Shift Keying Method for 5G applications
Improvement of this project :
To design the Differential phase shift keying method at 8 constellation point (8-DPSK) and 16 constellation point (16-DPSK).
To decreases the number of LUTs, LUTRAM, FF, BRAM, DSP, IO, BUFG as per the base paper work comparisons.
To developed the architecture of Modulator and also demodulator for both D8PSK and D16PSK method.
Software Implementation:
- Modelsim
- Xilinx
Proposed System:
Differential phase shift keying (DPSK) is a modulation system that allows for non-coherent demodulation and is used in a wide range of applications including wireless local area networks (WLANs), Bluetooth, and RFID. In a recent technology of digital and analog signal processing applications will have lot of interference will occurs due to signal transmission traffic in air medium, thus transmission and reception of any RF signal will have more interference, calibration, jitter noise in reception part. In this digital modulation and demodulation technique of transmission will have I/Q based differential signal method to reduced this calibration imbalance but some error will occur in gain and phase mismatches on high frequency range transmission, due to this problem, here the proposed work will designed a differential modulation scheme in phase shift keying method of DPSK modulation and demodulation in 8, 16 quadrant or constellation in differential signal processing with using technique of digital frequency calibration with carrier signal generation. This method is fully design with differential phase shifting method in FPGA with using Verilog HDL, these output will measure in the extraction, calibration of gain and phase mismatch and also verified in the compared terms of bit error rate, area, delay and power with using Xilinx Zynq 7000 FPGA based ZEN Board.
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FPGA Implementation of D8PSK Demodulator
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