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2015

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IEEE Transactions on VLSI 2015

Following Novelty based Research Projects not yet Published in Any Journal 

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sale OFFER 33%
Vedic Sutras
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2015, Area Efficient

A Comparative Analysis of Multiplier Topologies using Different Vedic Sutras

₹18,000.00 Original price was: ₹18,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 36%
High Efficiency Video Coding
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2015, Image Processing

A Deblocking Filter Hardware Architecture for the High Efficiency Video Coding Standard

₹25,000.00 Original price was: ₹25,000.00.₹16,000.00Current price is: ₹16,000.00.
sale OFFER 29%
Fixed and Reconfigurable Applications
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2015, Low power VLSI Design

A High Performance FIR Filter Architecture for Fixed and Reconfigurable Applications

₹14,000.00 Original price was: ₹14,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 30%
Hard and Soft SC-FDMA MIMO Detectors
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2015, High speed VLSI Design, IEEE, Low power VLSI Design, VLSI

A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
sale OFFER 25%
Multiple Error Correcting Architecture
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2015, Area Efficient

A Low-Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2 m)

₹16,000.00 Original price was: ₹16,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 33%
Novel Quantum Dot Cellular Automata
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2015, High speed VLSI Design

A Novel Quantum Dot Cellular Automata X bit × 32 bit SRAM

₹18,000.00 Original price was: ₹18,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 50%
Thermal Energy Harvesting Power Supply
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2015, Low power VLSI Design

A Thermal Energy Harvesting Power Supply with an Internal Start up Circuit

₹16,000.00 Original price was: ₹16,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 28%
Weighted Median Prediction
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2015, Image Processing

A VLSI Architecture for Watermarking of Gray scale Images using Weighted Median Prediction

₹25,000.00 Original price was: ₹25,000.00.₹18,000.00Current price is: ₹18,000.00.
sale OFFER 30%
Content Addressable Memory
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2015, Low power VLSI Design

Algorithm and Architecture for a Low Power Content Addressable Memory Based on Sparse Clustered Networks

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
sale OFFER 33%
Constant Multiplier
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2015, Area Efficient

An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis.

₹18,000.00 Original price was: ₹18,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 30%
UHF_RFID
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2015, Area Efficient

ASIC design of UHF RFID reader digital baseband

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
sale OFFER 40%
Block Interleaver
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2015, Image Processing

Block Interleaver Design for High Data Rate Wireless Networks

₹20,000.00 Original price was: ₹20,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 30%
LDPC_Decoder
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2015, Area Efficient

Byte-Reconfigurable LDPC Codec Design With Application to High-Performance ECC of NAND Flash Memory Systems

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
sale OFFER 33%
Approximate Compressors
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2015, Image Processing

Design and Analysis of Approximate Compressors for Multiplication

₹15,000.00 Original price was: ₹15,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 29%
Matirx Vector Multiplier
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2015, Area Efficient, IEEE, VLSI

Design and Low-Complexity Implementation of Matrix–Vector Multiplier for Iterative Methods in Communication Systems

₹14,000.00 Original price was: ₹14,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 40%
Full Adder
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2015, Low power VLSI Design

Design of 4-bit Ripple carry adder and using 9T full adder

₹10,000.00 Original price was: ₹10,000.00.₹6,000.00Current price is: ₹6,000.00.
sale OFFER 40%
Testable Reversible Sequential
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2015, Area Efficient, IEEE, VLSI

Design of Testable Reversible Sequential Circuits

₹10,000.00 Original price was: ₹10,000.00.₹6,000.00Current price is: ₹6,000.00.
sale OFFER 20%
DFT Based CMOS Receiver Design
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2015, Low power VLSI Design

Dual Use of Power Lines for Design for Testability A CMOS Receiver Design

₹10,000.00 Original price was: ₹10,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 33%
Long polar codes
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2015, Area Efficient, High speed VLSI Design

FPGA Implementation of Partially Parallel Encoder Architecture for Long Polar Code

₹18,000.00 Original price was: ₹18,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 28%
Color Demosaicking
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2015, Image Processing

Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications

₹25,000.00 Original price was: ₹25,000.00.₹18,000.00Current price is: ₹18,000.00.
sale OFFER 20%
FM0Manchester
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2015, Area Efficient

Fully Reused VLSI Architecture of FM0Manchester Encoding Using SOLS Technique for DSRC Applications

₹15,000.00 Original price was: ₹15,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 20%
Binary Weighted Current Steering DAC
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2015, Low power VLSI Design

Glitch Energy Reduction and SFDR Enhancement Techniques for Low Power Binary Weighted Current Steering DAC

₹20,000.00 Original price was: ₹20,000.00.₹16,000.00Current price is: ₹16,000.00.
sale OFFER 38%
Carry Skip Adder
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2015, Area Efficient

High Speed and Energy Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels

₹16,000.00 Original price was: ₹16,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 33%
Sub-threshold Adiabatic Logic for Ultra low Power Application
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2015, Low power VLSI Design

Implementation of Subthreshold Adiabatic Logic for Ultralow Power Application

₹12,000.00 Original price was: ₹12,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 40%
Parallel Graph Cut
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2015, Image Processing

JF-Cut: A Parallel Graph Cut Approach for Large-Scale Image and Video

₹20,000.00 Original price was: ₹20,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 20%
Level Converting
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2015, Low power VLSI Design

Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs

₹10,000.00 Original price was: ₹10,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 29%
Pulsed latched flip flop
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2015, IEEE, Low power VLSI Design, VLSI

Low Power and Area Efficient Shift Register Using Pulsed Latches

₹14,000.00 Original price was: ₹14,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 20%
MAC Architecture for DSP Applications
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2015, High speed VLSI Design

Low Power Compressor Based MAC Architecture for DSP Applications

₹10,000.00 Original price was: ₹10,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 38%
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2015, Area Efficient, IEEE, VLSI

Low Power Divider Using Vedic Mathematics

₹16,000.00 Original price was: ₹16,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 25%
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2015, Area Efficient, IEEE, VLSI

Novel Block-Formulation and Area-Delay-Efficient Reconfigurable Interpolation Filter Architecture for Multi-Standard SDR Applications

₹16,000.00 Original price was: ₹16,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 25%
Obfuscating DSP Circuits
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2015, Area Efficient

Obfuscating DSP Circuits via High Level Transformations

₹16,000.00 Original price was: ₹16,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 25%
Pre Encoded Multipliers Based on Non Redundant
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2015, Area Efficient

Pre Encoded Multipliers Based on Non Redundant Radix 4 Signed Digit Encoding

₹16,000.00 Original price was: ₹16,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 33%
Quaternary Logic Lookup Table
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2015, Area Efficient

Quaternary Logic Lookup Table in Standard CMOS

₹18,000.00 Original price was: ₹18,000.00.₹12,000.00Current price is: ₹12,000.00.
sale OFFER 50%
Quick View Add to cart
2015, Low power VLSI Design

Quaternary Logic Lookup Table in Standard CMOS

₹16,000.00 Original price was: ₹16,000.00.₹8,000.00Current price is: ₹8,000.00.
sale OFFER 38%
Parallel-Prefix Adders
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2015, Area Efficient, IEEE, VLSI

Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations

₹16,000.00 Original price was: ₹16,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 30%
Seizure Prediction using Hilbert Huang
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2015, Area Efficient

Seizure Prediction using Hilbert Huang Transform on Field Programmable Gate Array

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
sale OFFER 38%
Multi rate Techniques Low Power Divider Using Vedic Mathematics
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2015, High speed VLSI Design, IEEE, Low power VLSI Design, VLSI

To develop and Implement Low Power, High Speed VLSI for Processing Signals using Multi rate Techniques Low Power Divider Using Vedic Mathematics

₹16,000.00 Original price was: ₹16,000.00.₹10,000.00Current price is: ₹10,000.00.
sale OFFER 20%
Image Watermarking Algorithm
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2015, Image Processing

VLSI Implementation of Efficient Image Watermarking Algorithm

₹20,000.00 Original price was: ₹20,000.00.₹16,000.00Current price is: ₹16,000.00.
sale OFFER 30%
Loosy Image Compression
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2015, Image Processing

VLSI-Oriented Lossy Image Compression Approach using DA-Based 2D-Discrete Wavelet

₹20,000.00 Original price was: ₹20,000.00.₹14,000.00Current price is: ₹14,000.00.
IEEE Transactions on VLSI, VLSI IEEE Project, VLSI Low Power Project, VLSI High Speed Project, VLSI Area Efficient Project, Low Cost VLSI Projects, High Speed VLSI Design projects ( CDMA, RTOS, DSP, RF, IF, etc), Low Power VLSI Design projects, Area Efficient VLSI Design projects , Audio processing VLSI Design projects, Signal Processing VLSI Design projects, Image Processing VLSI Design projects, Backend VLSI Design projects ( CMOS, TFET, BisFET, FeFET, etc), Timing & Delay Reduction VLSI Projects, Internet of Things VLSI Projects, Testing, Reliability and Fault Tolerance VLSI Projects, VLSI Applications ( Communicational, Video, Security, Sensor Networks, etc), SOC VLSI Projects, Network on Chip VLSI Projects, Wireless Communication VLSI Projects, VLSI Verifications Projects ( UVM, OVM, VVM, System Verilog.

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